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Executive Presentation - Meeting the Critical Challenges of IC Implementation

At the 2008 Design Automation Conference in June, Joseph Sawicki, vice president and general manager of the Design to Silicon Division, laid out Mentor’s strategy to help customers with the challenges they face with IC implementation as they move to smaller process nodes. Sawicki discusses new technology acquisitions and developments, product enhancements, and organizational alignment. He also describes how Mentor is driving toward the...
Click here to preview in another window preview: http://www.mentor.com   08/21/2008

Tags: design-for-test, dfm, eda, verification, verilog, vhdl